A natural implementation of transactional memory (“TM”) is to require an older transaction to commit before retiring instructions that are part of a younger transaction. However, in an out-of-order processor it is often the case that a significant number of operations in a younger transaction have finished executing while waiting for the older transaction to commit. For example, a single store in the older transaction may require hundreds of cycles waiting for memory to respond. In the interim, an out-of-order machine could have executed all the instructions in a younger transaction. When the older transaction finally commits, there is now a backlog of instructions to retire from the younger transaction.